Revision 676fc8de319335b840934c57ec75bdbbf049b738 authored by Linus Torvalds on 07 March 2020, 13:59:30 UTC, committed by Linus Torvalds on 07 March 2020, 13:59:30 UTC
Pull sound fixes from Takashi Iwai:
 "The regular "bump-in-the-middle" updates, containing mostly ASoC-
  related fixes at this time. All changes are reasonably small.

  A few entries are for ASoC and ALSA core parts (DAPM, PCM, topology)
  for followups of the recent changes and potential buffer overflow by
  snprintf(), while the rest are (both new and old) device-specific
  fixes for Intel, meson, tas2562, rt1015, as well as the usual HD-audio
  quirks"

* tag 'sound-5.6-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (25 commits)
  ALSA: sgio2audio: Remove usage of dropped hw_params/hw_free functions
  ALSA: hda/realtek - Enable the headset of ASUS B9450FA with ALC294
  ALSA: hda/realtek - Fix silent output on Gigabyte X570 Aorus Master
  ALSA: hda/realtek - Add Headset Button supported for ThinkPad X1
  ALSA: hda/realtek - Add Headset Mic supported
  ASoC: wm8741: Fix typo in Kconfig prompt
  ASoC: stm32: sai: manage rebind issue
  ASoC: SOF: Fix snd_sof_ipc_stream_posn()
  ASoC: rt1015: modify pre-divider for sysclk
  ASoC: rt1015: add operation callback function for rt1015_dai[]
  ASoC: soc-component: tidyup snd_soc_pcm_component_sync_stop()
  ASoC: dapm: Correct DAPM handling of active widgets during shutdown
  ASoC: tas2562: Fix sample rate error message
  ASoC: Intel: Skylake: Fix available clock counter incrementation
  ASoC: soc-pcm/soc-compress: don't use snd_soc_dapm_stream_stop()
  ASoC: meson: g12a: add tohdmitx reset
  ASoC: pcm512x: Fix unbalanced regulator enable call in probe error path
  ASoC: soc-core: fix for_rtd_codec_dai_rollback() macro
  ASoC: topology: Fix memleak in soc_tplg_manifest_load()
  ASoC: topology: Fix memleak in soc_tplg_link_elems_load()
  ...
2 parent s 63849c8 + 5a56996
Raw File
Kconfig
# SPDX-License-Identifier: GPL-2.0-only
menuconfig PM_DEVFREQ
	bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support"
	select SRCU
	select PM_OPP
	help
	  A device may have a list of frequencies and voltages available.
	  devfreq, a generic DVFS framework can be registered for a device
	  in order to let the governor provided to devfreq choose an
	  operating frequency based on the device driver's policy.

	  Each device may have its own governor and policy. Devfreq can
	  reevaluate the device state periodically and/or based on the
	  notification to "nb", a notifier block, of devfreq.

	  Like some CPUs with CPUfreq, a device may have multiple clocks.
	  However, because the clock frequencies of a single device are
	  determined by the single device's state, an instance of devfreq
	  is attached to a single device and returns a "representative"
	  clock frequency of the device, which is also attached
	  to a device by 1-to-1. The device registering devfreq takes the
	  responsibility to "interpret" the representative frequency and
	  to set its every clock accordingly with the "target" callback
	  given to devfreq.

	  When OPP is used with the devfreq device, it is recommended to
	  register devfreq's nb to the OPP's notifier head.  If OPP is
	  used with the devfreq device, you may use OPP helper
	  functions defined in devfreq.h.

if PM_DEVFREQ

comment "DEVFREQ Governors"

config DEVFREQ_GOV_SIMPLE_ONDEMAND
	tristate "Simple Ondemand"
	help
	  Chooses frequency based on the recent load on the device. Works
	  similar as ONDEMAND governor of CPUFREQ does. A device with
	  Simple-Ondemand should be able to provide busy/total counter
	  values that imply the usage rate. A device may provide tuned
	  values to the governor with data field at devfreq_add_device().

config DEVFREQ_GOV_PERFORMANCE
	tristate "Performance"
	help
	  Sets the frequency at the maximum available frequency.
	  This governor always returns UINT_MAX as frequency so that
	  the DEVFREQ framework returns the highest frequency available
	  at any time.

config DEVFREQ_GOV_POWERSAVE
	tristate "Powersave"
	help
	  Sets the frequency at the minimum available frequency.
	  This governor always returns 0 as frequency so that
	  the DEVFREQ framework returns the lowest frequency available
	  at any time.

config DEVFREQ_GOV_USERSPACE
	tristate "Userspace"
	help
	  Sets the frequency at the user specified one.
	  This governor returns the user configured frequency if there
	  has been an input to /sys/devices/.../power/devfreq_set_freq.
	  Otherwise, the governor does not change the frequency
	  given at the initialization.

config DEVFREQ_GOV_PASSIVE
	tristate "Passive"
	help
	  Sets the frequency based on the frequency of its parent devfreq
	  device. This governor does not change the frequency by itself
	  through sysfs entries. The passive governor recommends that
	  devfreq device uses the OPP table to get the frequency/voltage.

comment "DEVFREQ Drivers"

config ARM_EXYNOS_BUS_DEVFREQ
	tristate "ARM Exynos Generic Memory Bus DEVFREQ Driver"
	depends on ARCH_EXYNOS || COMPILE_TEST
	select DEVFREQ_GOV_SIMPLE_ONDEMAND
	select DEVFREQ_GOV_PASSIVE
	select DEVFREQ_EVENT_EXYNOS_PPMU
	select PM_DEVFREQ_EVENT
	help
	  This adds the common DEVFREQ driver for Exynos Memory bus. Exynos
	  Memory bus has one more group of memory bus (e.g, MIF and INT block).
	  Each memory bus group could contain many memoby bus block. It reads
	  PPMU counters of memory controllers by using DEVFREQ-event device
	  and adjusts the operating frequencies and voltages with OPP support.
	  This does not yet operate with optimal voltages.

config ARM_IMX8M_DDRC_DEVFREQ
	tristate "i.MX8M DDRC DEVFREQ Driver"
	depends on (ARCH_MXC && HAVE_ARM_SMCCC) || \
		(COMPILE_TEST && HAVE_ARM_SMCCC)
	select DEVFREQ_GOV_SIMPLE_ONDEMAND
	select DEVFREQ_GOV_USERSPACE
	help
	  This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows
	  adjusting DRAM frequency.

config ARM_TEGRA_DEVFREQ
	tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver"
	depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \
		ARCH_TEGRA_132_SOC || ARCH_TEGRA_124_SOC || \
		ARCH_TEGRA_210_SOC || \
		COMPILE_TEST
	depends on COMMON_CLK
	help
	  This adds the DEVFREQ driver for the Tegra family of SoCs.
	  It reads ACTMON counters of memory controllers and adjusts the
	  operating frequencies and voltages with OPP support.

config ARM_TEGRA20_DEVFREQ
	tristate "NVIDIA Tegra20 DEVFREQ Driver"
	depends on (TEGRA_MC && TEGRA20_EMC) || COMPILE_TEST
	depends on COMMON_CLK
	select DEVFREQ_GOV_SIMPLE_ONDEMAND
	help
	  This adds the DEVFREQ driver for the Tegra20 family of SoCs.
	  It reads Memory Controller counters and adjusts the operating
	  frequencies and voltages with OPP support.

config ARM_RK3399_DMC_DEVFREQ
	tristate "ARM RK3399 DMC DEVFREQ Driver"
	depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \
		(COMPILE_TEST && HAVE_ARM_SMCCC)
	select DEVFREQ_EVENT_ROCKCHIP_DFI
	select DEVFREQ_GOV_SIMPLE_ONDEMAND
	select PM_DEVFREQ_EVENT
	help
	  This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller).
	  It sets the frequency for the memory controller and reads the usage counts
	  from hardware.

source "drivers/devfreq/event/Kconfig"

endif # PM_DEVFREQ
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