Revision 6af8ae321a801a4e20183454c65eb0d23069d8ac authored by Phil Elwell on 28 January 2021, 11:30:04 UTC, committed by Phil Elwell on 28 January 2021, 11:46:41 UTC
A relatively recent commit ([1]) contained optimisation for the PIO SPI FIFO-filling functions. The commit message includes the phrase "[t]he blind and counted loops are always called with nonzero count". This is technically true, but it is still possible for count to become zero before the loop is entered - if tfr->len is zero. Moving the loop exit condition to the end of the loop saves a few cycles, but results in a near-infinite loop should the revised count be zero on entry. Strangely, zero-lengthed transfers aren't filtered by the SPI framework and, even more strangely, the Python3 spidev library is triggering them for no obvious reason. Avoid the problem completely by bailing out of the main transfer function early if trf->len is zero, although there may be a case for moving the mitigation into the framework. See: https://github.com/raspberrypi/linux/issues/4100 Signed-off-by: Phil Elwell <phil@raspberrypi.com> [1] 26751de25d25 ("spi: bcm2835: Micro-optimise FIFO loops")
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Kconfig
# SPDX-License-Identifier: GPL-2.0-only
config ARCH_KEYSTONE
bool "Texas Instruments Keystone Devices"
depends on ARCH_MULTI_V7
select ARM_GIC
select HAVE_ARM_ARCH_TIMER
select KEYSTONE_TIMER
select ARCH_HAS_RESET_CONTROLLER
select ARM_ERRATA_798181 if SMP
select COMMON_CLK_KEYSTONE
select ARCH_SUPPORTS_BIG_ENDIAN
select ZONE_DMA if ARM_LPAE
select PINCTRL
select PM_GENERIC_DOMAINS if PM
help
Support for boards based on the Texas Instruments Keystone family of
SoCs.
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