https://github.com/torvalds/linux
Revision 6afa3bcf1f919c374d4606a7ed8078d3f67dfa90 authored by Eugeniy Paltsev on 08 September 2017, 18:42:33 UTC, committed by Vineet Gupta on 04 October 2017, 03:36:49 UTC
DW sdio controller has external ciu clock divider controlled via
register in SDIO IP. Due to its unexpected default value
(it should divide by 1 but it divides by 8)
SDIO IP uses wrong ciu clock and works unstable

So add temporary fix and change clock frequency from 100000000
to 12500000 Hz until we fix dw sdio driver itself.

Fixes SNPS STAR 9001204800

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
1 parent 043d1e7
History
Tip revision: 6afa3bcf1f919c374d4606a7ed8078d3f67dfa90 authored by Eugeniy Paltsev on 08 September 2017, 18:42:33 UTC
ARC: [plat-hsdk] sdio: Temporary fix of sdio ciu frequency
Tip revision: 6afa3bc
File Mode Size
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arch
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certs
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drivers
firmware
fs
include
init
ipc
kernel
lib
mm
net
samples
scripts
security
sound
tools
usr
virt
.cocciconfig -rw-r--r-- 59 bytes
.get_maintainer.ignore -rw-r--r-- 31 bytes
.gitattributes -rw-r--r-- 30 bytes
.gitignore -rw-r--r-- 1.3 KB
.mailmap -rw-r--r-- 8.1 KB
COPYING -rw-r--r-- 18.3 KB
CREDITS -rw-r--r-- 96.1 KB
Kbuild -rw-r--r-- 2.2 KB
Kconfig -rw-r--r-- 252 bytes
MAINTAINERS -rw-r--r-- 420.3 KB
Makefile -rw-r--r-- 58.2 KB
README -rw-r--r-- 722 bytes

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