Revision 6e21224a35c2ec236df45e1bd2469b0c9d659ba9 authored by Nava kishore Manne on 26 September 2015, 04:56:18 UTC, committed by Michal Simek on 28 September 2015, 16:25:53 UTC
This patch adds the uart BREAK detection support for Zynq Ultrascale+ MPSoC platform Signed-off-by: Nava kishore Manne <navam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
1 parent 37b8a97
File | Mode | Size |
---|---|---|
.gitignore | -rw-r--r-- | 6 bytes |
3CCFEM556.cis.ihex | -rw-r--r-- | 469 bytes |
3CXEM556.cis.ihex | -rw-r--r-- | 463 bytes |
COMpad2.cis.ihex | -rw-r--r-- | 363 bytes |
COMpad4.cis.ihex | -rw-r--r-- | 276 bytes |
DP83903.cis.ihex | -rw-r--r-- | 499 bytes |
LA-PCM.cis.ihex | -rw-r--r-- | 758 bytes |
MT5634ZLX.cis.ihex | -rw-r--r-- | 363 bytes |
NE2K.cis.ihex | -rw-r--r-- | 233 bytes |
PCMLM28.cis.ihex | -rw-r--r-- | 662 bytes |
PE-200.cis.ihex | -rw-r--r-- | 255 bytes |
PE520.cis.ihex | -rw-r--r-- | 266 bytes |
RS-COM-2P.cis.ihex | -rw-r--r-- | 307 bytes |
SW_555_SER.cis.ihex | -rw-r--r-- | 412 bytes |
SW_7xx_SER.cis.ihex | -rw-r--r-- | 460 bytes |
SW_8xx_SER.cis.ihex | -rw-r--r-- | 444 bytes |
tamarack.cis.ihex | -rw-r--r-- | 311 bytes |
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