Revision 72464382fc2d3673eb51f21a57f2c0a320c1552f authored by Christian König on 18 March 2019, 10:09:54 UTC, committed by Alex Deucher on 19 March 2019, 19:01:42 UTC
We only need to clear the bit in a 32bit integer. This fixes a crah on ARM64 and PPC64LE caused by "drm/amdgpu: update the vm invalidation engine layout V2" Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1 parent 39bbd33
rtl8712_edcasetting_regdef.h
/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
*
* Copyright(c) 2007 - 2010 Realtek Corporation. All rights reserved.
*
******************************************************************************/
#ifndef __RTL8712_EDCASETTING_REGDEF_H__
#define __RTL8712_EDCASETTING_REGDEF_H__
#define EDCA_VO_PARAM (RTL8712_EDCASETTING_ + 0x00)
#define EDCA_VI_PARAM (RTL8712_EDCASETTING_ + 0x04)
#define EDCA_BE_PARAM (RTL8712_EDCASETTING_ + 0x08)
#define EDCA_BK_PARAM (RTL8712_EDCASETTING_ + 0x0C)
#define BCNTCFG (RTL8712_EDCASETTING_ + 0x10)
#define CWRR (RTL8712_EDCASETTING_ + 0x12)
#define ACMAVG (RTL8712_EDCASETTING_ + 0x16)
#define ACMHWCTRL (RTL8712_EDCASETTING_ + 0x17)
#define VO_ADMTIME (RTL8712_EDCASETTING_ + 0x18)
#define VI_ADMTIME (RTL8712_EDCASETTING_ + 0x1C)
#define BE_ADMTIME (RTL8712_EDCASETTING_ + 0x20)
#define RL (RTL8712_EDCASETTING_ + 0x24)
#endif /* __RTL8712_EDCASETTING_REGDEF_H__ */
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