Revision 7b2e932f633bcb7b190fc7031ce6dac75f8c3472 authored by Vineet Gupta on 21 February 2019, 21:44:49 UTC, committed by Vineet Gupta on 21 February 2019, 22:53:36 UTC
The first release of core4 (0x54) was dual issue only (HS4x). Newer releases allow hardware to be configured as single issue (HS3x) or dual issue. Prevent accessing a HS4x only aux register in HS3x, which otherwise leads to illegal instruction exceptions Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
1 parent b6835ea
rsaprivkey.asn1
RsaPrivKey ::= SEQUENCE {
version INTEGER,
n INTEGER ({ rsa_get_n }),
e INTEGER ({ rsa_get_e }),
d INTEGER ({ rsa_get_d }),
prime1 INTEGER ({ rsa_get_p }),
prime2 INTEGER ({ rsa_get_q }),
exponent1 INTEGER ({ rsa_get_dp }),
exponent2 INTEGER ({ rsa_get_dq }),
coefficient INTEGER ({ rsa_get_qinv })
}
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