Revision 7bf811a595a895b7a886dcf218d0d34f97df76dc authored by Josef Bacik on 08 October 2013, 02:11:09 UTC, committed by Chris Mason on 11 October 2013, 01:27:56 UTC
Liu fixed part of this problem and unfortunately I steered him in slightly the
wrong direction and so didn't completely fix the problem. The problem is we
limit the size of the delalloc range we are looking for to max bytes and then we
try to lock that range. If we fail to lock the pages in that range we will
shrink the max bytes to a single page and re loop. However if our first page is
inside of the delalloc range then we will end up limiting the end of the range
to a period before our first page. This is illustrated below
[0 -------- delalloc range --------- 256mb]
[page]
So find_delalloc_range will return with delalloc_start as 0 and end as 128mb,
and then we will notice that delalloc_start < *start and adjust it up, but not
adjust delalloc_end up, so things go sideways. To fix this we need to not limit
the max bytes in find_delalloc_range, but in find_lock_delalloc_range and that
way we don't end up with this confusion. Thanks,
Signed-off-by: Josef Bacik <jbacik@fusionio.com>
Signed-off-by: Chris Mason <chris.mason@fusionio.com>
1 parent 4871c15
svga.h
#ifndef _LINUX_SVGA_H
#define _LINUX_SVGA_H
#include <linux/pci.h>
#include <video/vga.h>
/* Terminator for register set */
#define VGA_REGSET_END_VAL 0xFF
#define VGA_REGSET_END {VGA_REGSET_END_VAL, 0, 0}
struct vga_regset {
u8 regnum;
u8 lowbit;
u8 highbit;
};
/* ------------------------------------------------------------------------- */
#define SVGA_FORMAT_END_VAL 0xFFFF
#define SVGA_FORMAT_END {SVGA_FORMAT_END_VAL, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 0, 0, 0, 0, 0, 0}
struct svga_fb_format {
/* var part */
u32 bits_per_pixel;
struct fb_bitfield red;
struct fb_bitfield green;
struct fb_bitfield blue;
struct fb_bitfield transp;
u32 nonstd;
/* fix part */
u32 type;
u32 type_aux;
u32 visual;
u32 xpanstep;
u32 xresstep;
};
struct svga_timing_regs {
const struct vga_regset *h_total_regs;
const struct vga_regset *h_display_regs;
const struct vga_regset *h_blank_start_regs;
const struct vga_regset *h_blank_end_regs;
const struct vga_regset *h_sync_start_regs;
const struct vga_regset *h_sync_end_regs;
const struct vga_regset *v_total_regs;
const struct vga_regset *v_display_regs;
const struct vga_regset *v_blank_start_regs;
const struct vga_regset *v_blank_end_regs;
const struct vga_regset *v_sync_start_regs;
const struct vga_regset *v_sync_end_regs;
};
struct svga_pll {
u16 m_min;
u16 m_max;
u16 n_min;
u16 n_max;
u16 r_min;
u16 r_max; /* r_max < 32 */
u32 f_vco_min;
u32 f_vco_max;
u32 f_base;
};
/* Write a value to the attribute register */
static inline void svga_wattr(void __iomem *regbase, u8 index, u8 data)
{
vga_r(regbase, VGA_IS1_RC);
vga_w(regbase, VGA_ATT_IW, index);
vga_w(regbase, VGA_ATT_W, data);
}
/* Write a value to a sequence register with a mask */
static inline void svga_wseq_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
{
vga_wseq(regbase, index, (data & mask) | (vga_rseq(regbase, index) & ~mask));
}
/* Write a value to a CRT register with a mask */
static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 mask)
{
vga_wcrt(regbase, index, (data & mask) | (vga_rcrt(regbase, index) & ~mask));
}
static inline int svga_primary_device(struct pci_dev *dev)
{
u16 flags;
pci_read_config_word(dev, PCI_COMMAND, &flags);
return (flags & PCI_COMMAND_IO);
}
void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value);
void svga_set_default_gfx_regs(void __iomem *regbase);
void svga_set_default_atc_regs(void __iomem *regbase);
void svga_set_default_seq_regs(void __iomem *regbase);
void svga_set_default_crt_regs(void __iomem *regbase);
void svga_set_textmode_vga_regs(void __iomem *regbase);
void svga_settile(struct fb_info *info, struct fb_tilemap *map);
void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area);
void svga_tilefill(struct fb_info *info, struct fb_tilerect *rect);
void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit);
void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tilecursor *cursor);
int svga_get_tilemax(struct fb_info *info);
void svga_get_caps(struct fb_info *info, struct fb_blit_caps *caps,
struct fb_var_screeninfo *var);
int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u16 *r, int node);
int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node);
void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, u32 hmul, u32 hdiv, u32 vmul, u32 vdiv, u32 hborder, int node);
int svga_match_format(const struct svga_fb_format *frm, struct fb_var_screeninfo *var, struct fb_fix_screeninfo *fix);
#endif /* _LINUX_SVGA_H */
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