Revision 7ce9d5d1f3c8736511daa413c64985a05b2feee3 authored by Eric Sandeen on 04 March 2009, 23:38:18 UTC, committed by Theodore Ts'o on 04 March 2009, 23:38:18 UTC
I was seeing fsck errors on inode bitmaps after a 4 thread dbench run on a 4 cpu machine: Inode bitmap differences: -50736 -(50752--50753) etc... I believe that this is because ext4_free_inode() uses atomic bitops, and although ext4_new_inode() *used* to also use atomic bitops for synchronization, commit 393418676a7602e1d7d3f6e560159c65c8cbd50e changed this to use the sb_bgl_lock, so that we could also synchronize against read_inode_bitmap and initialization of uninit inode tables. However, that change left ext4_free_inode using atomic bitops, which I think leaves no synchronization between setting & unsetting bits in the inode table. The below patch fixes it for me, although I wonder if we're getting at all heavy-handed with this spinlock... Signed-off-by: Eric Sandeen <sandeen@redhat.com> Reviewed-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
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cvisionppc.h
/*
* Phase5 CybervisionPPC (TVP4020) definitions for the Permedia2 framebuffer
* driver.
*
* Copyright (c) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
* --------------------------------------------------------------------------
* $Id: cvisionppc.h,v 1.8 1999/01/28 13:18:07 illo Exp $
* --------------------------------------------------------------------------
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
* for more details.
*/
#ifndef CVISIONPPC_H
#define CVISIONPPC_H
#ifndef PM2FB_H
#include "pm2fb.h"
#endif
struct cvppc_par {
unsigned char* pci_config;
unsigned char* pci_bridge;
u32 user_flags;
};
#define CSPPC_PCI_BRIDGE 0xfffe0000
#define CSPPC_BRIDGE_ENDIAN 0x0000
#define CSPPC_BRIDGE_INT 0x0010
#define CVPPC_PCI_CONFIG 0xfffc0000
#define CVPPC_ROM_ADDRESS 0xe2000001
#define CVPPC_REGS_REGION 0xef000000
#define CVPPC_FB_APERTURE_ONE 0xe0000000
#define CVPPC_FB_APERTURE_TWO 0xe1000000
#define CVPPC_FB_SIZE 0x00800000
#define CVPPC_MEM_CONFIG_OLD 0xed61fcaa /* FIXME Fujitsu?? */
#define CVPPC_MEM_CONFIG_NEW 0xed41c532 /* FIXME USA?? */
#define CVPPC_MEMCLOCK 83000 /* in KHz */
/* CVPPC_BRIDGE_ENDIAN */
#define CSPPCF_BRIDGE_BIG_ENDIAN 0x02
/* CVPPC_BRIDGE_INT */
#define CSPPCF_BRIDGE_ACTIVE_INT2 0x01
#endif /* CVISIONPPC_H */
/*****************************************************************************
* That's all folks!
*****************************************************************************/
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