https://github.com/torvalds/linux
Revision 82de6a6fb67e16a30ec2f586b1f6976c2d7b4b62 authored by Tudor Ambarus on 03 December 2019, 14:50:01 UTC, committed by Miquel Raynal on 09 January 2020, 19:11:34 UTC
Micron flashes do not support 16 bit writes on the Status Register.
According to micron datasheets, when using the Write Status Register
(01h) command, the chip select should be driven LOW and held LOW until
the eighth bit of the last data byte has been latched in, after which
it must be driven HIGH. If CS is not driven HIGH, the command is not
executed, flag status register error bits are not set, and the write enable
latch remains set to 1. This fixes the lock operations on micron flashes.
Reported-by: John Garry <john.garry@huawei.com>
Fixes: 39d1e3340c73 ("mtd: spi-nor: Fix clearing of QE bit on lock()/unlock()")
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: John Garry <john.garry@huawei.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
1 parent de08b5a
Tip revision: 82de6a6fb67e16a30ec2f586b1f6976c2d7b4b62 authored by Tudor Ambarus on 03 December 2019, 14:50:01 UTC
mtd: spi-nor: Fix the writing of the Status Register on micron flashes
mtd: spi-nor: Fix the writing of the Status Register on micron flashes
Tip revision: 82de6a6
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| crypto | ||
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| include | ||
| init | ||
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| .clang-format | -rw-r--r-- | 15.0 KB |
| .cocciconfig | -rw-r--r-- | 59 bytes |
| .get_maintainer.ignore | -rw-r--r-- | 71 bytes |
| .gitattributes | -rw-r--r-- | 62 bytes |
| .gitignore | -rw-r--r-- | 1.7 KB |
| .mailmap | -rw-r--r-- | 14.1 KB |
| COPYING | -rw-r--r-- | 423 bytes |
| CREDITS | -rw-r--r-- | 97.3 KB |
| Kbuild | -rw-r--r-- | 1.3 KB |
| Kconfig | -rw-r--r-- | 595 bytes |
| MAINTAINERS | -rw-r--r-- | 526.8 KB |
| Makefile | -rw-r--r-- | 59.4 KB |
| README | -rw-r--r-- | 727 bytes |
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