https://github.com/torvalds/linux
Revision 83fd43449baaf88fe5c03dd0081a062041837c51 authored by Markos Chandras on 05 November 2014, 08:25:37 UTC, committed by Ralf Baechle on 24 November 2014, 06:44:04 UTC
Commit de8974e3f76c0 ("MIPS: asm: r4kcache: Add EVA cache flushing
functions") added cache function for EVA using the cachee instruction.
However, it didn't add a case for the protected_writeback_dcache_line.
mips_dsemul() calls r4k_flush_cache_sigtramp() which in turn uses
the protected_writeback_dcache_line() to flush the trampoline code
back to memory. This used the wrong "cache" instruction leading to
random userland crashes on non-FPU cores.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.15+
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8331/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent 7f0dd76
History
Tip revision: 83fd43449baaf88fe5c03dd0081a062041837c51 authored by Markos Chandras on 05 November 2014, 08:25:37 UTC
MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line
Tip revision: 83fd434
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