Revision 8986d2f50e1a9ba63f64ccbf59181886aa7898c3 authored by Atsushi Nemoto on 24 June 2008, 14:26:38 UTC, committed by Ralf Baechle on 03 July 2008, 18:14:27 UTC
The txx9_tmr_init() will not clear a timer counter register in a certain case. The counter register is cleared on 1->0 transition of TCE bit if CRE=1. So just clearing the TCE bit is not enough. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| File | Mode | Size |
|---|---|---|
| Kbuild | -rw-r--r-- | 26 bytes |
| ib_addr.h | -rw-r--r-- | 4.8 KB |
| ib_cache.h | -rw-r--r-- | 4.3 KB |
| ib_cm.h | -rw-r--r-- | 18.3 KB |
| ib_fmr_pool.h | -rw-r--r-- | 3.4 KB |
| ib_mad.h | -rw-r--r-- | 22.3 KB |
| ib_marshall.h | -rw-r--r-- | 2.0 KB |
| ib_pack.h | -rw-r--r-- | 7.6 KB |
| ib_sa.h | -rw-r--r-- | 14.0 KB |
| ib_smi.h | -rw-r--r-- | 4.4 KB |
| ib_umem.h | -rw-r--r-- | 2.6 KB |
| ib_user_cm.h | -rw-r--r-- | 6.4 KB |
| ib_user_mad.h | -rw-r--r-- | 7.0 KB |
| ib_user_sa.h | -rw-r--r-- | 1.8 KB |
| ib_user_verbs.h | -rw-r--r-- | 13.4 KB |
| ib_verbs.h | -rw-r--r-- | 55.0 KB |
| iw_cm.h | -rw-r--r-- | 8.6 KB |
| rdma_cm.h | -rw-r--r-- | 10.7 KB |
| rdma_cm_ib.h | -rw-r--r-- | 1.7 KB |
| rdma_user_cm.h | -rw-r--r-- | 4.8 KB |
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