https://github.com/torvalds/linux
Revision 8b8a7634315be747959b0165e38138879f93cf6c authored by Ralf Baechle on 19 September 2013, 09:15:49 UTC, committed by Ralf Baechle on 19 September 2013, 09:23:10 UTC
Currently the kernel will always use the FR=0 register model for O32.  If
an O32 application did enable FR=1 mode, some data from another application
might be leaked in the extra registers becoming visible.

Iow, this patch is meant to make the kernel MIPS R5 tolerant but leaves
proper MIPS R5 support to a future patchset.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent 2f9ee82
History
Tip revision: 8b8a7634315be747959b0165e38138879f93cf6c authored by Ralf Baechle on 19 September 2013, 09:15:49 UTC
MIPS: Disable usermode switching of the FR bit for MIPS R5 CPUs.
Tip revision: 8b8a763
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arch
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drivers
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include
init
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lib
mm
net
samples
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security
sound
tools
usr
virt
.gitignore -rw-r--r-- 1.1 KB
.mailmap -rw-r--r-- 4.4 KB
COPYING -rw-r--r-- 18.3 KB
CREDITS -rw-r--r-- 93.1 KB
Kbuild -rw-r--r-- 2.5 KB
Kconfig -rw-r--r-- 252 bytes
MAINTAINERS -rw-r--r-- 256.8 KB
Makefile -rw-r--r-- 47.4 KB
README -rw-r--r-- 18.3 KB
REPORTING-BUGS -rw-r--r-- 7.3 KB

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