Revision 8f4fd86aa5d6aa122619623910065d236592e37c authored by David Woodhouse on 06 January 2021, 15:39:55 UTC, committed by Juergen Gross on 13 January 2021, 15:12:03 UTC
With INTX or GSI delivery, Xen uses the event channel structures of CPU0.

If the interrupt gets handled by Linux on a different CPU, then no events
are seen as pending. Rather than introducing locking to allow other CPUs
to process CPU0's events, just ensure that the PCI interrupts happens
only on CPU0.

Signed-off-by: David Woodhouse <dwmw@amazon.co.uk>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/20210106153958.584169-3-dwmw2@infradead.org
Signed-off-by: Juergen Gross <jgross@suse.com>
1 parent 3499ba8
History
File Mode Size
api.rst -rw-r--r-- 11.9 KB
arkfb.rst -rw-r--r-- 2.0 KB
aty128fb.rst -rw-r--r-- 2.2 KB
cirrusfb.rst -rw-r--r-- 2.0 KB
cmap_xfbdev.rst -rw-r--r-- 1.9 KB
deferred_io.rst -rw-r--r-- 3.0 KB
efifb.rst -rw-r--r-- 2.2 KB
ep93xx-fb.rst -rw-r--r-- 4.5 KB
fbcon.rst -rw-r--r-- 12.0 KB
framebuffer.rst -rw-r--r-- 13.9 KB
gxfb.rst -rw-r--r-- 1.3 KB
index.rst -rw-r--r-- 586 bytes
intel810.rst -rw-r--r-- 8.4 KB
intelfb.rst -rw-r--r-- 3.8 KB
internals.rst -rw-r--r-- 2.7 KB
lxfb.rst -rw-r--r-- 1.3 KB
matroxfb.rst -rw-r--r-- 19.6 KB
metronomefb.rst -rw-r--r-- 2.0 KB
modedb.rst -rw-r--r-- 7.5 KB
pvr2fb.rst -rw-r--r-- 2.2 KB
pxafb.rst -rw-r--r-- 4.6 KB
s3fb.rst -rw-r--r-- 2.6 KB
sa1100fb.rst -rw-r--r-- 1.4 KB
sh7760fb.rst -rw-r--r-- 4.3 KB
sisfb.rst -rw-r--r-- 6.5 KB
sm501.rst -rw-r--r-- 316 bytes
sm712fb.rst -rw-r--r-- 858 bytes
sstfb.rst -rw-r--r-- 6.8 KB
tgafb.rst -rw-r--r-- 2.5 KB
tridentfb.rst -rw-r--r-- 2.8 KB
udlfb.rst -rw-r--r-- 7.3 KB
uvesafb.rst -rw-r--r-- 7.2 KB
vesafb.rst -rw-r--r-- 6.5 KB
viafb.modes -rw-r--r-- 30.8 KB
viafb.rst -rw-r--r-- 8.9 KB
vt8623fb.rst -rw-r--r-- 1.9 KB

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