Revision 9a3e52e3465f85d203d0fd2910ca3625b3c45420 authored by Wolfgang Bumiller on 25 September 2018, 08:15:06 UTC, committed by Markus Armbruster on 06 November 2018, 16:02:49 UTC
monitor_resume() and monitor_suspend() both want to "kick" the I/O thread if it is there, but in monitor_suspend() lacked the use_io_thread flag condition. This is required when we later only spawn the thread on first use. Signed-off-by: Wolfgang Bumiller <w.bumiller@proxmox.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Message-Id: <20180925081507.11873-2-w.bumiller@proxmox.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
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û ! #address-cells #size-cells compatible model device_type reg bootargs linux,stdout-path #cpus clock-frequency d-cache-baseaddr d-cache-highaddr d-cache-line-size d-cache-size i-cache-baseaddr i-cache-highaddr i-cache-line-size i-cache-size timebase-frequency xlnx,addr-tag-bits xlnx,allow-dcache-wr xlnx,allow-icache-wr xlnx,area-optimized xlnx,cache-byte-size xlnx,d-lmb xlnx,d-opb xlnx,d-plb xlnx,data-size xlnx,dcache-addr-tag xlnx,dcache-always-used xlnx,dcache-byte-size xlnx,dcache-line-len xlnx,dcache-use-fsl xlnx,debug-enabled xlnx,div-zero-exception xlnx,dopb-bus-exception xlnx,dynamic-bus-sizing xlnx,edge-is-positive xlnx,family xlnx,fpu-exception xlnx,fsl-data-size xlnx,fsl-exception xlnx,fsl-links xlnx,i-lmb xlnx,i-opb xlnx,i-plb xlnx,icache-always-used xlnx,icache-line-len xlnx,icache-use-fsl xlnx,ill-opcode-exception xlnx,instance xlnx,interconnect xlnx,interrupt-is-edge xlnx,iopb-bus-exception xlnx,mmu-dtlb-size xlnx,mmu-itlb-size xlnx,mmu-tlb-access xlnx,mmu-zones xlnx,number-of-pc-brk xlnx,number-of-rd-addr-brk xlnx,number-of-wr-addr-brk xlnx,opcode-0x0-illegal xlnx,pvr xlnx,pvr-user1 xlnx,pvr-user2 xlnx,reset-msr xlnx,sco xlnx,unaligned-exceptions xlnx,use-barrel xlnx,use-dcache xlnx,use-div xlnx,use-ext-brk xlnx,use-ext-nm-brk xlnx,use-extended-fsl-instr xlnx,use-fpu xlnx,use-hw-mul xlnx,use-icache xlnx,use-interrupt xlnx,use-mmu xlnx,use-msr-instr xlnx,use-pcmp-instr ranges interrupt-parent interrupts local-mac-address xlnx,duplex xlnx,rx-ping-pong xlnx,tx-ping-pong bank-width xlnx,include-datawidth-matching-0 xlnx,include-datawidth-matching-1 xlnx,include-datawidth-matching-2 xlnx,include-datawidth-matching-3 xlnx,include-negedge-ioregs xlnx,include-plb-ipif xlnx,include-wrbuf xlnx,max-mem-width xlnx,mch-native-dwidth xlnx,mch-plb-clk-period-ps xlnx,mch-splb-awidth xlnx,mch0-accessbuf-depth xlnx,mch0-protocol xlnx,mch0-rddatabuf-depth xlnx,mch1-accessbuf-depth xlnx,mch1-protocol xlnx,mch1-rddatabuf-depth xlnx,mch2-accessbuf-depth xlnx,mch2-protocol xlnx,mch2-rddatabuf-depth xlnx,mch3-accessbuf-depth xlnx,mch3-protocol xlnx,mch3-rddatabuf-depth xlnx,mem0-width xlnx,mem1-width xlnx,mem2-width xlnx,mem3-width xlnx,num-banks-mem xlnx,num-channels xlnx,priority-mode xlnx,synch-mem-0 xlnx,synch-mem-1 xlnx,synch-mem-2 xlnx,synch-mem-3 xlnx,synch-pipedelay-0 xlnx,synch-pipedelay-1 xlnx,synch-pipedelay-2 xlnx,synch-pipedelay-3 xlnx,tavdv-ps-mem-0 xlnx,tavdv-ps-mem-1 xlnx,tavdv-ps-mem-2 xlnx,tavdv-ps-mem-3 xlnx,tcedv-ps-mem-0 xlnx,tcedv-ps-mem-1 xlnx,tcedv-ps-mem-2 xlnx,tcedv-ps-mem-3 xlnx,thzce-ps-mem-0 xlnx,thzce-ps-mem-1 xlnx,thzce-ps-mem-2 xlnx,thzce-ps-mem-3 xlnx,thzoe-ps-mem-0 xlnx,thzoe-ps-mem-1 xlnx,thzoe-ps-mem-2 xlnx,thzoe-ps-mem-3 xlnx,tlzwe-ps-mem-0 xlnx,tlzwe-ps-mem-1 xlnx,tlzwe-ps-mem-2 xlnx,tlzwe-ps-mem-3 xlnx,twc-ps-mem-0 xlnx,twc-ps-mem-1 xlnx,twc-ps-mem-2 xlnx,twc-ps-mem-3 xlnx,twp-ps-mem-0 xlnx,twp-ps-mem-1 xlnx,twp-ps-mem-2 xlnx,twp-ps-mem-3 xlnx,xcl0-linesize xlnx,xcl0-writexfer xlnx,xcl1-linesize xlnx,xcl1-writexfer xlnx,xcl2-linesize xlnx,xcl2-writexfer xlnx,xcl3-linesize xlnx,xcl3-writexfer xlnx,all-inputs xlnx,all-inputs-2 xlnx,dout-default xlnx,dout-default-2 xlnx,gpio-width xlnx,interrupt-present xlnx,is-bidir xlnx,is-bidir-2 xlnx,is-dual xlnx,tri-default xlnx,tri-default-2 current-speed port-number xlnx,baudrate xlnx,data-bits xlnx,odd-parity xlnx,use-parity xlnx,jtag-chain xlnx,mb-dbg-ports xlnx,uart-width xlnx,use-uart xlnx,write-fsl-ports #interrupt-cells interrupt-controller xlnx,kind-of-intr xlnx,num-intr-inputs linux,phandle xlnx,count-width xlnx,gen0-assert xlnx,gen1-assert xlnx,one-timer-only xlnx,trig0-assert xlnx,trig1-assert 
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