Revision 9bd9ddb7f89edae241d2da78e3119f226b9b0cf6 authored by Jisheng Zhang on 30 March 2016, 11:55:21 UTC, committed by David S. Miller on 31 March 2016, 19:15:01 UTC
The mvneta is also used in some Marvell berlin family SoCs which may have 64bytes cacheline size. Replace the MVNETA_CPU_D_CACHE_LINE_SIZE usage with L1_CACHE_BYTES. And since dma_alloc_coherent() is always cacheline size aligned, so remove the align checks. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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File | Mode | Size |
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Documentation | ||
arch | ||
block | ||
certs | ||
crypto | ||
drivers | ||
firmware | ||
fs | ||
include | ||
init | ||
ipc | ||
kernel | ||
lib | ||
mm | ||
net | ||
samples | ||
scripts | ||
security | ||
sound | ||
tools | ||
usr | ||
virt | ||
.get_maintainer.ignore | -rw-r--r-- | 31 bytes |
.gitignore | -rw-r--r-- | 1.2 KB |
.mailmap | -rw-r--r-- | 5.5 KB |
COPYING | -rw-r--r-- | 18.3 KB |
CREDITS | -rw-r--r-- | 95.4 KB |
Kbuild | -rw-r--r-- | 2.6 KB |
Kconfig | -rw-r--r-- | 252 bytes |
MAINTAINERS | -rw-r--r-- | 342.7 KB |
Makefile | -rw-r--r-- | 54.9 KB |
README | -rw-r--r-- | 18.1 KB |
REPORTING-BUGS | -rw-r--r-- | 7.3 KB |
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