https://github.com/torvalds/linux
Revision a754f70886ebcc7fda3d18a828e0e54e3ffc86d9 authored by Ralf Baechle on 03 November 2007, 01:01:37 UTC, committed by Ralf Baechle on 15 November 2007, 23:21:48 UTC
The recent switch of the Sibyte SOCs from the processor specific cache
managment code in c-sb1.c to c-r4k.c lost this old hack

    [MIPS] Hack for SB1 cache issues

    Removing flush_icache_page a while ago broke SB1 which was using an empty
    flush_data_cache_page function.  This glues things well enough so a more
    efficient but also more intrusive solution can be found later.

    Signed-Off-By: Thiemo Seufer <ths@networkno.de>
    Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

in the hope it was no longer needed.  As it turns it still is so resurrect
it until there is a better solution.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent 99fee6d
History
Tip revision: a754f70886ebcc7fda3d18a828e0e54e3ffc86d9 authored by Ralf Baechle on 03 November 2007, 01:01:37 UTC
[MIPS] Sibyte: resurrect old cache hack.
Tip revision: a754f70
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