https://github.com/torvalds/linux
Revision a967a289f16969527a8a41e261695c639a69bee4 authored by Yash Shah on 06 May 2019, 10:48:40 UTC, committed by Palmer Dabbelt on 17 May 2019, 03:42:13 UTC
The driver currently supports only SiFive FU540-C000 platform.

The initial version of L2 cache controller driver includes:
- Initial configuration reporting at boot up.
- Support for ECC related functionality.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
1 parent 5545b6d
History
Tip revision: a967a289f16969527a8a41e261695c639a69bee4 authored by Yash Shah on 06 May 2019, 10:48:40 UTC
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
Tip revision: a967a28
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LICENSES
arch
block
certs
crypto
drivers
fs
include
init
ipc
kernel
lib
mm
net
samples
scripts
security
sound
tools
usr
virt
.clang-format -rw-r--r-- 14.6 KB
.cocciconfig -rw-r--r-- 59 bytes
.get_maintainer.ignore -rw-r--r-- 31 bytes
.gitattributes -rw-r--r-- 30 bytes
.gitignore -rw-r--r-- 1.5 KB
.mailmap -rw-r--r-- 11.0 KB
COPYING -rw-r--r-- 423 bytes
CREDITS -rw-r--r-- 96.9 KB
Kbuild -rw-r--r-- 1.5 KB
Kconfig -rw-r--r-- 563 bytes
MAINTAINERS -rw-r--r-- 491.4 KB
Makefile -rw-r--r-- 58.3 KB
README -rw-r--r-- 727 bytes

README

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