Revision aab7a2414ba0d5c3d0571a90031b535adba7146a authored by Kuninori Morimoto on 28 September 2018, 02:38:36 UTC, committed by Simon Horman on 05 November 2018, 14:08:44 UTC
hscif2 has 4 dmas, but has only 2 dma-names. This patch add missing dma-names. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Fixes: e0f0bda79337701a ("arm64: dts: renesas: r8a7795: sort subnodes of the soc node") Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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File | Mode | Size |
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Kconfig | -rw-r--r-- | 6.3 KB |
Makefile | -rw-r--r-- | 1.6 KB |
altera-cvp.c | -rw-r--r-- | 14.1 KB |
altera-fpga2sdram.c | -rw-r--r-- | 4.9 KB |
altera-freeze-bridge.c | -rw-r--r-- | 6.8 KB |
altera-hps2fpga.c | -rw-r--r-- | 5.8 KB |
altera-pr-ip-core-plat.c | -rw-r--r-- | 1.4 KB |
altera-pr-ip-core.c | -rw-r--r-- | 5.0 KB |
altera-ps-spi.c | -rw-r--r-- | 7.7 KB |
dfl-afu-dma-region.c | -rw-r--r-- | 11.6 KB |
dfl-afu-main.c | -rw-r--r-- | 14.5 KB |
dfl-afu-region.c | -rw-r--r-- | 4.1 KB |
dfl-afu.h | -rw-r--r-- | 2.9 KB |
dfl-fme-br.c | -rw-r--r-- | 2.5 KB |
dfl-fme-main.c | -rw-r--r-- | 6.3 KB |
dfl-fme-mgr.c | -rw-r--r-- | 9.2 KB |
dfl-fme-pr.c | -rw-r--r-- | 11.5 KB |
dfl-fme-pr.h | -rw-r--r-- | 2.0 KB |
dfl-fme-region.c | -rw-r--r-- | 2.1 KB |
dfl-fme.h | -rw-r--r-- | 1.0 KB |
dfl-pci.c | -rw-r--r-- | 6.1 KB |
dfl.c | -rw-r--r-- | 25.8 KB |
dfl.h | -rw-r--r-- | 12.1 KB |
fpga-bridge.c | -rw-r--r-- | 12.3 KB |
fpga-mgr.c | -rw-r--r-- | 19.2 KB |
fpga-region.c | -rw-r--r-- | 8.5 KB |
ice40-spi.c | -rw-r--r-- | 5.4 KB |
machxo2-spi.c | -rw-r--r-- | 9.3 KB |
of-fpga-region.c | -rw-r--r-- | 12.1 KB |
socfpga-a10.c | -rw-r--r-- | 15.3 KB |
socfpga.c | -rw-r--r-- | 17.0 KB |
ts73xx-fpga.c | -rw-r--r-- | 4.3 KB |
xilinx-pr-decoupler.c | -rw-r--r-- | 4.1 KB |
xilinx-spi.c | -rw-r--r-- | 4.9 KB |
zynq-fpga.c | -rw-r--r-- | 17.5 KB |
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