Add bus_dma(9) and endianness support to ste(4).
   o Sorted includes and added missing header files.
   o Added basic endianness support. In theory ste(4) should work on
     any architectures.
   o Remove the use of contigmalloc(9), contigfree(9) and vtophys(9).
   o Added 8 byte alignment limitation of TX/RX descriptor.
   o Added 1 byte alignment requirement for TX/RX buffers.
   o ste(4) controllers does not support DAC. Limit DMA address space
     to be within 32bit address.
   o Added spare DMA map to gracefully recover from DMA map failure.
   o Removed dead code for checking STE_RXSTAT_DMADONE bit. The bit
     was already checked in each iteration of loop so it can't be true.
   o Added second argument count to ste_rxeof(). It is used to limit
     number of iterations done in RX handler. ATM polling is the only
     consumer.
   o Removed ste_rxeoc() which was added to address RX stuck issue
     (cvs rev 1.66). Unlike TX descriptors, ST201 supports chaining
     descriptors to form a ring for RX descriptors. If RX descriptor
     chaining is not supported it's possible for controller to stop
     receiving incoming frames once controller pass the end of RX
     descriptor which in turn requires driver post new RX
     descriptors to receive more frames. For TX descriptors which
     does not support chaning, we exactly do manual chaining in
     driver by concatenating new descriptors to the end of previous
     TX chain.
     Maybe the workaround was borrowed from other drivers that does
     not support RX descriptor chaining, which is not valid for ST201
     controllers. I still have no idea how this address RX stuck
     issue and I can't reproduce the RX stuck issue on DFE-550TX
     controller.
   o Removed hw.ste_rxsyncs sysctl as the workaround was removed.
   o TX/RX side bus_dmamap_load_mbuf_sg(9) support.
   o Reimplemented optimized ste_encap().
   o Simplified TX logic of ste_start_locked().
   o Added comments for TFD/RFD requirements.
   o Increased number of RX descriptors to 128 from 64. 128 gave much
     better performance than 64 under high network loads.