https://github.com/torvalds/linux
Revision b1c1759cd192fe1d27989f986c7f6b2939905e0c authored by David Milburn on 11 May 2008, 18:37:05 UTC, committed by Jean Delvare on 11 May 2008, 18:37:05 UTC
Per the PIIX4 errata, there maybe a delay between setting the
start bit in the Smbus Host Controller Register and the transaction
actually starting. If the driver doesn't delay long enough, it
may appear that the transaction is complete when actually it
hasn't started, this may lead to bus collisions.

While 1 ms appears to be enough for most chips, the ServerWorks CSB5
wants 2 ms.

Signed-off-by: David Milburn <dmilburn@redhat.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
1 parent f5fff36
History
Tip revision: b1c1759cd192fe1d27989f986c7f6b2939905e0c authored by David Milburn on 11 May 2008, 18:37:05 UTC
i2c-piix4: Increase the intitial delay for the ServerWorks CSB5
Tip revision: b1c1759
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