Much (but not all) of the RTC state is kept in the RTC peripheral which
has its own power domain.  Periodically (1 HZ), that state is synced from
one power domain to the other (peripheral->core).  When we are resuming,
we need to wait for the sync to occur so that we don't get a mismatch of
reading undefined state in the rest of the driver.

Further, once the externally maintained bits have been synced back into
the core, we then need to restore the bits maintained in the core.  In our
particular case, that is just the write completion interrupt bit.

If we don't do any of this, working with the RTC causes ~5 second delays
from time to time after waking up due to the write completion interrupt
never firing.

Reported-by: Michael Dean <mdean@aeronix.com>
Reported-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>