Revision b9162d20ed493bc0d5ea3016647d636628e1f9d5 authored by Jiangfeng Xiao on 09 July 2019, 03:31:09 UTC, committed by David S. Miller on 09 July 2019, 21:29:26 UTC
The buf unit size of HI13X1_GMAC is cache_line_size, which is 64, so the address we write to the buf register needs to be shifted right by 6 bits. The 31st bit of the PPE_CFG_CPU_ADD_ADDR register of HI13X1_GMAC indicates whether to release the buffer of the message, and the low indicates that it is valid. Signed-off-by: Jiangfeng Xiao <xiaojiangfeng@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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| File | Mode | Size |
|---|---|---|
| hisilicon | ||
| Kconfig | -rw-r--r-- | 3.6 KB |
| Makefile | -rw-r--r-- | 553 bytes |
| arm-cci.c | -rw-r--r-- | 48.1 KB |
| arm-ccn.c | -rw-r--r-- | 45.8 KB |
| arm_dsu_pmu.c | -rw-r--r-- | 21.4 KB |
| arm_pmu.c | -rw-r--r-- | 20.8 KB |
| arm_pmu_acpi.c | -rw-r--r-- | 6.5 KB |
| arm_pmu_platform.c | -rw-r--r-- | 5.5 KB |
| arm_smmuv3_pmu.c | -rw-r--r-- | 23.8 KB |
| arm_spe_pmu.c | -rw-r--r-- | 33.2 KB |
| qcom_l2_pmu.c | -rw-r--r-- | 27.3 KB |
| qcom_l3_pmu.c | -rw-r--r-- | 23.9 KB |
| thunderx2_pmu.c | -rw-r--r-- | 21.5 KB |
| xgene_pmu.c | -rw-r--r-- | 56.7 KB |
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