Revision b9162d20ed493bc0d5ea3016647d636628e1f9d5 authored by Jiangfeng Xiao on 09 July 2019, 03:31:09 UTC, committed by David S. Miller on 09 July 2019, 21:29:26 UTC
The buf unit size of HI13X1_GMAC is cache_line_size, which is 64, so the address we write to the buf register needs to be shifted right by 6 bits. The 31st bit of the PPE_CFG_CPU_ADD_ADDR register of HI13X1_GMAC indicates whether to release the buffer of the message, and the low indicates that it is valid. Signed-off-by: Jiangfeng Xiao <xiaojiangfeng@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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| File | Mode | Size |
|---|---|---|
| Makefile | -rw-r--r-- | 292 bytes |
| pm8001_chips.h | -rw-r--r-- | 2.9 KB |
| pm8001_ctl.c | -rw-r--r-- | 24.3 KB |
| pm8001_ctl.h | -rw-r--r-- | 2.6 KB |
| pm8001_defs.h | -rw-r--r-- | 4.3 KB |
| pm8001_hwi.c | -rw-r--r-- | 162.9 KB |
| pm8001_hwi.h | -rw-r--r-- | 30.8 KB |
| pm8001_init.c | -rw-r--r-- | 40.9 KB |
| pm8001_sas.c | -rw-r--r-- | 37.9 KB |
| pm8001_sas.h | -rw-r--r-- | 23.7 KB |
| pm80xx_hwi.c | -rw-r--r-- | 150.9 KB |
| pm80xx_hwi.h | -rw-r--r-- | 48.5 KB |
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