Revision ba9ad2af7019956b990ad654c56da5bac1e8b71b authored by Jean Delvare on 11 October 2016, 11:13:27 UTC, committed by Wolfram Sang on 25 October 2016, 10:00:01 UTC
Starting with the 8-Series/C220 PCH (Lynx Point), the SMBus controller includes a SPD EEPROM protection mechanism. Once the SPD Write Disable bit is set, only reads are allowed to slave addresses 0x50-0x57. However the legacy implementation of I2C Block Read since the ICH5 looks like a write, and is therefore blocked by the SPD protection mechanism. This causes the eeprom and at24 drivers to fail. So assume that I2C Block Read is implemented as an actual read on these chipsets. I tested it on my Q87 chipset and it seems to work just fine. Signed-off-by: Jean Delvare <jdelvare@suse.de> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> [wsa: rebased to v4.9-rc2] Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Makefile
#
# Makefile for the key AF.
#
obj-$(CONFIG_NET_KEY) += af_key.o
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