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23 October 2021, 00:29:24 UTC
Revision bfcf1ae2b2b1c09ee2c420313afe47ac5cc32d3f authored by Linus Torvalds on 15 May 2010, 04:28:42 UTC, committed by Linus Torvalds on 15 May 2010, 04:28:42 UTC 
Merge master.kernel.org:/home/rmk/linux-2.6-arm
 
* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: 6126/1: ARM mpcore_wdt: fix build failure and other fixes
  ARM: 6125/1: ARM TWD: move TWD registers to common header
  ARM: 6110/1: Fix Thumb-2 kernel builds when UACCESS_WITH_MEMCPY is enabled
  ARM: 6112/1: Use the Inner Shareable I-cache and BTB ops on ARMv7 SMP
  ARM: 6111/1: Implement read/write for ownership in the ARMv6 DMA cache ops
  ARM: 6106/1: Implement copy_to_user_page() for noMMU
  ARM: 6105/1: Fix the __arm_ioremap_caller() definition in nommu.c
2 parent s ecbb458 + 98af057
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Tip revision: bfcf1ae2b2b1c09ee2c420313afe47ac5cc32d3f authored by Linus Torvalds on 15 May 2010, 04:28:42 UTC
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Tip revision: bfcf1ae
cpufreq-nforce2.txt 

The cpufreq-nforce2 driver changes the FSB on nVidia nForce2 platforms.

This works better than on other platforms, because the FSB of the CPU
can be controlled independently from the PCI/AGP clock.

The module has two options:

	fid: 	 multiplier * 10 (for example 8.5 = 85)
	min_fsb: minimum FSB

If not set, fid is calculated from the current CPU speed and the FSB.
min_fsb defaults to FSB at boot time - 50 MHz.

IMPORTANT: The available range is limited downwards!
           Also the minimum available FSB can differ, for systems 
           booting with 200 MHz, 150 should always work.
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