Revision ca71ba4d0cfcf5f7a8e9b24339547b5a72299f80 authored by John Baldwin on 26 January 2010, 20:58:09 UTC, committed by John Baldwin on 26 January 2010, 20:58:09 UTC
Optimize the cache flushing done when changing caching attributes of pages by doing nothing for CPUs that support self-snooping and using CLFLUSH instead of a full cache invalidate when possible. - On i386 take care of possible mappings of the page by sf buffer by utilizing the mapping for clflush, otherwise map the page transiently. Amd64 uses the direct map. - Do not use CLFLUSH on Intel CPUs due to problems with flushing the local APIC range by default. This can be further controlled via the hw.clflush_disable loader tunable. A setting of 1 disables the use of CLFLUSH. A setting of 0 allows CLFLUSH to be used for Intel CPUs when CPUID_SS is not present. Approved by: re (kib)
1 parent a6a19cb
File | Mode | Size |
---|---|---|
nlm.h | -rw-r--r-- | 7.3 KB |
nlm_advlock.c | -rw-r--r-- | 29.0 KB |
nlm_prot.h | -rw-r--r-- | 15.9 KB |
nlm_prot_clnt.c | -rw-r--r-- | 11.5 KB |
nlm_prot_impl.c | -rw-r--r-- | 54.4 KB |
nlm_prot_server.c | -rw-r--r-- | 15.6 KB |
nlm_prot_svc.c | -rw-r--r-- | 15.4 KB |
nlm_prot_xdr.c | -rw-r--r-- | 8.6 KB |
sm_inter.h | -rw-r--r-- | 2.7 KB |
sm_inter_xdr.c | -rw-r--r-- | 1.8 KB |
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