https://github.com/torvalds/linux
Revision cc33ae437975416a1b78f99e2715e91ab643526a authored by David Daney on 20 December 2010, 23:54:50 UTC, committed by Ralf Baechle on 18 January 2011, 18:30:23 UTC
If the CPU supports BBIT0 and BBIT1, use them in TLB handlers as they
are more efficient than an AND followed by an branch and then
restoring the clobbered register.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1873/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
1 parent afc7c98
History
Tip revision: cc33ae437975416a1b78f99e2715e91ab643526a authored by David Daney on 20 December 2010, 23:54:50 UTC
MIPS: Use BBIT instructions in TLB handlers
Tip revision: cc33ae4
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