https://github.com/torvalds/linux
Revision d1658268e43980c071dbffc3d894f6f6c4b6732a authored by Mario Limonciello on 27 May 2021, 15:45:34 UTC, committed by Greg Kroah-Hartman on 09 June 2021, 08:36:00 UTC
The XHCI controller is required to enter D3hot rather than D3cold for AMD
s2idle on this hardware generation.

Otherwise, the 'Controller Not Ready' (CNR) bit is not being cleared by
host in resume and eventually this results in xhci resume failures during
the s2idle wakeup.

Link: https://lore.kernel.org/linux-usb/1612527609-7053-1-git-send-email-Prike.Liang@amd.com/
Suggested-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Cc: stable <stable@vger.kernel.org> # 5.11+
Link: https://lore.kernel.org/r/20210527154534.8900-1-mario.limonciello@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
1 parent 1958ff5
History
Tip revision: d1658268e43980c071dbffc3d894f6f6c4b6732a authored by Mario Limonciello on 27 May 2021, 15:45:34 UTC
usb: pci-quirks: disable D3cold on xhci suspend for s2idle on AMD Renoir
Tip revision: d165826
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.clang-format -rw-r--r-- 16.4 KB
.cocciconfig -rw-r--r-- 59 bytes
.get_maintainer.ignore -rw-r--r-- 71 bytes
.gitattributes -rw-r--r-- 62 bytes
.gitignore -rw-r--r-- 1.9 KB
.mailmap -rw-r--r-- 19.4 KB
COPYING -rw-r--r-- 496 bytes
CREDITS -rw-r--r-- 98.6 KB
Kbuild -rw-r--r-- 1.3 KB
Kconfig -rw-r--r-- 555 bytes
MAINTAINERS -rw-r--r-- 588.4 KB
Makefile -rw-r--r-- 64.3 KB
README -rw-r--r-- 727 bytes

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