Revision dac876193cd79ced36d0462749ea47c05844fb49 authored by Terry Loftin on 09 April 2010, 10:29:49 UTC, committed by David S. Miller on 13 April 2010, 10:03:13 UTC
Tx ring buffers after tx_ring->next_to_use are volatile and could change, possibly causing a crash. Stop cleaning when we hit tx_ring->next_to_use. Signed-off-by: Terry Loftin <terry.loftin@hp.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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sgi-visws.txt
The SGI Visual Workstations (models 320 and 540) are based around
the Cobalt, Lithium, and Arsenic ASICs. The Cobalt ASIC is the
main system ASIC which interfaces the 1-4 IA32 cpus, the memory
system, and the I/O system in the Lithium ASIC. The Cobalt ASIC
also contains the 3D gfx rendering engine which renders to main
system memory -- part of which is used as the frame buffer which
is DMA'ed to a video connector using the Arsenic ASIC. A PIIX4
chip and NS87307 are used to provide legacy device support (IDE,
serial, floppy, and parallel).
The Visual Workstation chipset largely conforms to the PC architecture
with some notable exceptions such as interrupt handling.
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