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23 October 2021, 00:29:24 UTC
Revision dbead405801c8d5aa1bc21ab6e2a47f060d47c06 authored by Catalin Marinas on 01 February 2010, 17:50:40 UTC, committed by Russell King on 01 February 2010, 20:05:09 UTC 
ARM: 5909/1: ARM: Correct the FPSCR bits setting when raising exceptions
 
Commit c98929c07a removed the clearing of the FPSCR[31:28] bits from the
vfp_raise_exceptions() function and the new bits are or'ed with the old
FPSCR bits leading to unexpected results (the original commit was
referring to the cumulative bits - FPSCR[4:0]).

Reported-by: Tom Hameenanttila <tmhameen@marvell.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
1 parent c540b9f
History
Tip revision: dbead405801c8d5aa1bc21ab6e2a47f060d47c06 authored by Catalin Marinas on 01 February 2010, 17:50:40 UTC
ARM: 5909/1: ARM: Correct the FPSCR bits setting when raising exceptions
Tip revision: dbead40
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