Revision dd784cb65dbcf1f5221e76db4d921ccbfb859493 authored by BALATON Zoltan on 10 April 2024, 22:25:43 UTC, committed by Michael Tokarev on 16 April 2024, 14:27:39 UTC
Move calculation of mask after the switch which sets the function number for PIRQ/PINT pins to make sure the state of these pins are kept track of separately and IRQ is raised if any of them is active. Cc: qemu-stable@nongnu.org Fixes: 7e01bd80c1 hw/isa/vt82c686: Bring back via_isa_set_irq() Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240410222543.0EA534E6005@zero.eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> (cherry picked from commit f33274265a242df5d9fdb00915fe72fbb1b2a3c4) Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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| File | Mode | Size |
|---|---|---|
| Kconfig | -rw-r--r-- | 370 bytes |
| allwinner-rtc.c | -rw-r--r-- | 12.7 KB |
| aspeed_rtc.c | -rw-r--r-- | 4.3 KB |
| ds1338.c | -rw-r--r-- | 6.2 KB |
| exynos4210_rtc.c | -rw-r--r-- | 17.2 KB |
| goldfish_rtc.c | -rw-r--r-- | 9.0 KB |
| ls7a_rtc.c | -rw-r--r-- | 12.2 KB |
| m41t80.c | -rw-r--r-- | 2.5 KB |
| m48t59-internal.h | -rw-r--r-- | 2.5 KB |
| m48t59-isa.c | -rw-r--r-- | 4.9 KB |
| m48t59.c | -rw-r--r-- | 18.3 KB |
| mc146818rtc.c | -rw-r--r-- | 33.0 KB |
| meson.build | -rw-r--r-- | 1014 bytes |
| pl031.c | -rw-r--r-- | 9.7 KB |
| sun4v-rtc.c | -rw-r--r-- | 2.2 KB |
| trace-events | -rw-r--r-- | 1.6 KB |
| trace.h | -rw-r--r-- | 32 bytes |
| twl92230.c | -rw-r--r-- | 24.8 KB |
| xlnx-zynqmp-rtc.c | -rw-r--r-- | 8.4 KB |
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