Revision dd784cb65dbcf1f5221e76db4d921ccbfb859493 authored by BALATON Zoltan on 10 April 2024, 22:25:43 UTC, committed by Michael Tokarev on 16 April 2024, 14:27:39 UTC
Move calculation of mask after the switch which sets the function
number for PIRQ/PINT pins to make sure the state of these pins are
kept track of separately and IRQ is raised if any of them is active.

Cc: qemu-stable@nongnu.org
Fixes: 7e01bd80c1 hw/isa/vt82c686: Bring back via_isa_set_irq()
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240410222543.0EA534E6005@zero.eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
(cherry picked from commit f33274265a242df5d9fdb00915fe72fbb1b2a3c4)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
1 parent fcbb086
History
File Mode Size
Kconfig -rw-r--r-- 416 bytes
leon3.c -rw-r--r-- 13.4 KB
meson.build -rw-r--r-- 251 bytes
sun4m.c -rw-r--r-- 47.1 KB
sun4m_iommu.c -rw-r--r-- 13.9 KB
trace-events -rw-r--r-- 1.0 KB
trace.h -rw-r--r-- 34 bytes

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