Revision df545d1cd01aab3ba3f687d5423e6c3687b069d8 authored by Laxman Dewangan on 01 March 2013, 14:43:46 UTC, committed by Samuel Ortiz on 12 March 2013, 08:25:49 UTC
Currently driver sets the irq type to IRQF_TRIGGER_LOW which is
causing interrupt registration failure in ARM based SoCs as:
[    0.208479] genirq: Setting trigger mode 8 for irq 118 failed (gic_set_type+0x0/0xf0)
[    0.208513] dummy 0-0059: Failed to request IRQ 118: -22

Provide the irq flags through platform data if device is registered
through board file or get the irq type from DT node property in place
of hardcoding the irq flag in driver to support multiple platforms.

Also configure the device to generate the interrupt signal according to
flag type.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
1 parent 5c854aa
Raw File
timeconst.bc
scale=0

define gcd(a,b) {
	auto t;
	while (b) {
		t = b;
		b = a % b;
		a = t;
	}
	return a;
}

/* Division by reciprocal multiplication. */
define fmul(b,n,d) {
       return (2^b*n+d-1)/d;
}

/* Adjustment factor when a ceiling value is used.  Use as:
   (imul * n) + (fmulxx * n + fadjxx) >> xx) */
define fadj(b,n,d) {
	auto v;
	d = d/gcd(n,d);
	v = 2^b*(d-1)/d;
	return v;
}

/* Compute the appropriate mul/adj values as well as a shift count,
   which brings the mul value into the range 2^b-1 <= x < 2^b.  Such
   a shift value will be correct in the signed integer range and off
   by at most one in the upper half of the unsigned range. */
define fmuls(b,n,d) {
	auto s, m;
	for (s = 0; 1; s++) {
		m = fmul(s,n,d);
		if (m >= 2^(b-1))
			return s;
	}
	return 0;
}

define timeconst(hz) {
	print "/* Automatically generated by kernel/timeconst.bc */\n"
	print "/* Time conversion constants for HZ == ", hz, " */\n"
	print "\n"

	print "#ifndef KERNEL_TIMECONST_H\n"
	print "#define KERNEL_TIMECONST_H\n\n"

	print "#include <linux/param.h>\n"
	print "#include <linux/types.h>\n\n"

	print "#if HZ != ", hz, "\n"
	print "#error \qkernel/timeconst.h has the wrong HZ value!\q\n"
	print "#endif\n\n"

	if (hz < 2) {
		print "#error Totally bogus HZ value!\n"
	} else {
		s=fmuls(32,1000,hz)
		obase=16
		print "#define HZ_TO_MSEC_MUL32\tU64_C(0x", fmul(s,1000,hz), ")\n"
		print "#define HZ_TO_MSEC_ADJ32\tU64_C(0x", fadj(s,1000,hz), ")\n"
		obase=10
		print "#define HZ_TO_MSEC_SHR32\t", s, "\n"

		s=fmuls(32,hz,1000)
		obase=16
		print "#define MSEC_TO_HZ_MUL32\tU64_C(0x", fmul(s,hz,1000), ")\n"
		print "#define MSEC_TO_HZ_ADJ32\tU64_C(0x", fadj(s,hz,1000), ")\n"
		obase=10
		print "#define MSEC_TO_HZ_SHR32\t", s, "\n"

		obase=10
		cd=gcd(hz,1000)
		print "#define HZ_TO_MSEC_NUM\t\t", 1000/cd, "\n"
		print "#define HZ_TO_MSEC_DEN\t\t", hz/cd, "\n"
		print "#define MSEC_TO_HZ_NUM\t\t", hz/cd, "\n"
		print "#define MSEC_TO_HZ_DEN\t\t", 1000/cd, "\n"
		print "\n"

		s=fmuls(32,1000000,hz)
		obase=16
		print "#define HZ_TO_USEC_MUL32\tU64_C(0x", fmul(s,1000000,hz), ")\n"
		print "#define HZ_TO_USEC_ADJ32\tU64_C(0x", fadj(s,1000000,hz), ")\n"
		obase=10
		print "#define HZ_TO_USEC_SHR32\t", s, "\n"

		s=fmuls(32,hz,1000000)
		obase=16
		print "#define USEC_TO_HZ_MUL32\tU64_C(0x", fmul(s,hz,1000000), ")\n"
		print "#define USEC_TO_HZ_ADJ32\tU64_C(0x", fadj(s,hz,1000000), ")\n"
		obase=10
		print "#define USEC_TO_HZ_SHR32\t", s, "\n"

		obase=10
		cd=gcd(hz,1000000)
		print "#define HZ_TO_USEC_NUM\t\t", 1000000/cd, "\n"
		print "#define HZ_TO_USEC_DEN\t\t", hz/cd, "\n"
		print "#define USEC_TO_HZ_NUM\t\t", hz/cd, "\n"
		print "#define USEC_TO_HZ_DEN\t\t", 1000000/cd, "\n"
		print "\n"

		print "#endif /* KERNEL_TIMECONST_H */\n"
	}
	halt
}

timeconst(hz)
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