https://github.com/torvalds/linux
Revision e1cab970574c001d83e59ca8388c474a57a1afb6 authored by Rodrigo Vivi on 31 August 2022, 21:45:38 UTC, committed by Rodrigo Vivi on 06 September 2022, 18:51:43 UTC
We need to inform PCODE of a desired ring frequencies so PCODE update the memory frequencies to us. rps->min_freq and rps->max_freq are the frequencies used in that request. However they were unset when SLPC was enabled and PCODE never updated the memory freq. v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right frequencies from the get_ia_constants instead of the fake init of rps' min and max. v3: don't forget the max <= min return v4: Move all the freq conversion to intel_rps.c. And the max <= min check to where it belongs. v5: (Ashutosh) Fix old comment s/50 HZ/50 MHz and add a doc explaining the "raw format" Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled") Cc: <stable@vger.kernel.org> # v5.15+ Cc: Ashutosh Dixit <ashutosh.dixit@intel.com> Tested-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220831214538.143950-1-rodrigo.vivi@intel.com (cherry picked from commit 018a7bdbb090b9155a6509a0d1a684db4afaa5b1) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
1 parent edca5a2
Tip revision: e1cab970574c001d83e59ca8388c474a57a1afb6 authored by Rodrigo Vivi on 31 August 2022, 21:45:38 UTC
drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC
drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC
Tip revision: e1cab97
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