Revision ee4063fa6bd801fa6ea045f23a2934db009b3dac authored by Ian Abbott on 19 May 2010, 15:59:40 UTC, committed by Greg Kroah-Hartman on 04 June 2010, 20:38:53 UTC
The internal state of an 82C54 counter timer chip will get messed up if
several threads read, write, configure, or check the status of the chip
simultaneously.  Protect the register access sequences with a spin lock.

Signed-off-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

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.gitignore -rw-r--r-- 936 bytes
.mailmap -rw-r--r-- 3.9 KB
COPYING -rw-r--r-- 18.3 KB
CREDITS -rw-r--r-- 91.8 KB
Kbuild -rw-r--r-- 2.4 KB
MAINTAINERS -rw-r--r-- 170.0 KB
Makefile -rw-r--r-- 52.6 KB
README -rw-r--r-- 17.0 KB
REPORTING-BUGS -rw-r--r-- 3.3 KB

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