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Revision ef82bdc57a204bf452da9f7c273c21462f17344e authored by Linus Torvalds on 26 September 2011, 20:35:43 UTC, committed by Linus Torvalds on 26 September 2011, 20:35:43 UTC 
Merge branch 'hwmon-for-linus' of git://github.com/groeck/linux
 
* 'hwmon-for-linus' of git://github.com/groeck/linux:
  hwmon: (coretemp) remove struct platform_data * parameter from create_core_data()
  hwmon: (coretemp) constify static data
  hwmon: (coretemp) don't use kernel assigned CPU number as platform device ID
  hwmon: (ds620) Fix handling of negative temperatures
  hwmon: (w83791d) rename prototype parameter from 'register' to 'reg'
  hwmon: (coretemp) Don't use threshold registers for tempX_max
  hwmon: (coretemp) Let the user force TjMax
  hwmon: (coretemp) Drop duplicate function get_pkg_tjmax
2 parent s 231e58e + 2f1c3db
Raw File
at91sam9_wdt.h 
/*
 * drivers/watchdog/at91sam9_wdt.h
 *
 * Copyright (C) 2007 Andrew Victor
 * Copyright (C) 2007 Atmel Corporation.
 *
 * Watchdog Timer (WDT) - System peripherals regsters.
 * Based on AT91SAM9261 datasheet revision D.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef AT91_WDT_H
#define AT91_WDT_H

#define AT91_WDT_CR		(AT91_WDT + 0x00)	/* Watchdog Control Register */
#define		AT91_WDT_WDRSTT		(1    << 0)		/* Restart */
#define		AT91_WDT_KEY		(0xa5 << 24)		/* KEY Password */

#define AT91_WDT_MR		(AT91_WDT + 0x04)	/* Watchdog Mode Register */
#define		AT91_WDT_WDV		(0xfff << 0)		/* Counter Value */
#define		AT91_WDT_WDFIEN		(1     << 12)		/* Fault Interrupt Enable */
#define		AT91_WDT_WDRSTEN	(1     << 13)		/* Reset Processor */
#define		AT91_WDT_WDRPROC	(1     << 14)		/* Timer Restart */
#define		AT91_WDT_WDDIS		(1     << 15)		/* Watchdog Disable */
#define		AT91_WDT_WDD		(0xfff << 16)		/* Delta Value */
#define		AT91_WDT_WDDBGHLT	(1     << 28)		/* Debug Halt */
#define		AT91_WDT_WDIDLEHLT	(1     << 29)		/* Idle Halt */

#define AT91_WDT_SR		(AT91_WDT + 0x08)	/* Watchdog Status Register */
#define		AT91_WDT_WDUNF		(1 << 0)		/* Watchdog Underflow */
#define		AT91_WDT_WDERR		(1 << 1)		/* Watchdog Error */

#endif
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