Revision f55966571d5eb2876a11e48e798b4592fa1ffbb7 authored by Linus Torvalds on 08 July 2021, 19:28:15 UTC, committed by Linus Torvalds on 08 July 2021, 19:28:15 UTC
Pull drm fixes from Dave Airlie: "Some fixes for rc1 that came in the past weeks, mainly a bunch of amdgpu fixes, some i915 and the rest are misc around the place. I'm sending this a bit early so some more stuff may show up, but I'll probably take tomorrow off. dma-buf: - doc fixes amdgpu: - Misc Navi fixes - Powergating fix - Yellow Carp updates - Beige Goby updates - S0ix fix - Revert overlay validation fix - GPU reset fix for DC - PPC64 fix - Add new dimgrey cavefish DID - RAS fix - TTM fixes amdkfd: - SVM fixes radeon: - Fix missing drm_gem_object_put in error path - NULL ptr deref fix i915: - display DP VSC fix - DG1 display fix - IRQ fixes - IRQ demidlayering gma500: - bo leaks in error paths fixed" * tag 'drm-next-2021-07-08-1' of git://anongit.freedesktop.org/drm/drm: (52 commits) drm/i915: Drop all references to DRM IRQ midlayer drm/i915: Use the correct IRQ during resume drm/i915/display/dg1: Correctly map DPLLs during state readout drm/i915/display: Do not zero past infoframes.vsc drm/amdgpu: Conditionally reset SDMA RAS error counts drm/amdkfd: Maintain svm_bo reference in page->zone_device_data drm/amdkfd: add invalid pages debug at vram migration drm/amdkfd: skip migration for pages already in VRAM drm/amdkfd: skip invalid pages during migrations drm/amdkfd: classify and map mixed svm range pages in GPU drm/amdkfd: use hmm range fault to get both domain pfns drm/amdgpu: get owner ref in validate and map drm/amdkfd: set owner ref to svm range prefault drm/amdkfd: add owner ref param to get hmm pages drm/amdkfd: device pgmap owner at the svm migrate init drm/amdkfd: inc counter on child ranges with xnack off drm/amd/display: Extend DMUB diagnostic logging to DCN3.1 drm/amdgpu: Update NV SIMD-per-CU to 2 drm/amdgpu: add new dimgrey cavefish DID drm/amd/pm: skip PrepareMp1ForUnload message in s0ix ...
ebc-c384_wdt.c
// SPDX-License-Identifier: GPL-2.0
/*
* Watchdog timer driver for the WinSystems EBC-C384
* Copyright (C) 2016 William Breathitt Gray
*/
#include <linux/device.h>
#include <linux/dmi.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/ioport.h>
#include <linux/isa.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#define MODULE_NAME "ebc-c384_wdt"
#define WATCHDOG_TIMEOUT 60
/*
* The timeout value in minutes must fit in a single byte when sent to the
* watchdog timer; the maximum timeout possible is 15300 (255 * 60) seconds.
*/
#define WATCHDOG_MAX_TIMEOUT 15300
#define BASE_ADDR 0x564
#define ADDR_EXTENT 5
#define CFG_ADDR (BASE_ADDR + 1)
#define PET_ADDR (BASE_ADDR + 2)
static bool nowayout = WATCHDOG_NOWAYOUT;
module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
static unsigned timeout;
module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
__MODULE_STRING(WATCHDOG_TIMEOUT) ")");
static int ebc_c384_wdt_start(struct watchdog_device *wdev)
{
unsigned t = wdev->timeout;
/* resolution is in minutes for timeouts greater than 255 seconds */
if (t > 255)
t = DIV_ROUND_UP(t, 60);
outb(t, PET_ADDR);
return 0;
}
static int ebc_c384_wdt_stop(struct watchdog_device *wdev)
{
outb(0x00, PET_ADDR);
return 0;
}
static int ebc_c384_wdt_set_timeout(struct watchdog_device *wdev, unsigned t)
{
/* resolution is in minutes for timeouts greater than 255 seconds */
if (t > 255) {
/* round second resolution up to minute granularity */
wdev->timeout = roundup(t, 60);
/* set watchdog timer for minutes */
outb(0x00, CFG_ADDR);
} else {
wdev->timeout = t;
/* set watchdog timer for seconds */
outb(0x80, CFG_ADDR);
}
return 0;
}
static const struct watchdog_ops ebc_c384_wdt_ops = {
.start = ebc_c384_wdt_start,
.stop = ebc_c384_wdt_stop,
.set_timeout = ebc_c384_wdt_set_timeout
};
static const struct watchdog_info ebc_c384_wdt_info = {
.options = WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT,
.identity = MODULE_NAME
};
static int ebc_c384_wdt_probe(struct device *dev, unsigned int id)
{
struct watchdog_device *wdd;
if (!devm_request_region(dev, BASE_ADDR, ADDR_EXTENT, dev_name(dev))) {
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
BASE_ADDR, BASE_ADDR + ADDR_EXTENT);
return -EBUSY;
}
wdd = devm_kzalloc(dev, sizeof(*wdd), GFP_KERNEL);
if (!wdd)
return -ENOMEM;
wdd->info = &ebc_c384_wdt_info;
wdd->ops = &ebc_c384_wdt_ops;
wdd->timeout = WATCHDOG_TIMEOUT;
wdd->min_timeout = 1;
wdd->max_timeout = WATCHDOG_MAX_TIMEOUT;
watchdog_set_nowayout(wdd, nowayout);
watchdog_init_timeout(wdd, timeout, dev);
return devm_watchdog_register_device(dev, wdd);
}
static struct isa_driver ebc_c384_wdt_driver = {
.probe = ebc_c384_wdt_probe,
.driver = {
.name = MODULE_NAME
},
};
static int __init ebc_c384_wdt_init(void)
{
if (!dmi_match(DMI_BOARD_NAME, "EBC-C384 SBC"))
return -ENODEV;
return isa_register_driver(&ebc_c384_wdt_driver, 1);
}
static void __exit ebc_c384_wdt_exit(void)
{
isa_unregister_driver(&ebc_c384_wdt_driver);
}
module_init(ebc_c384_wdt_init);
module_exit(ebc_c384_wdt_exit);
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
MODULE_DESCRIPTION("WinSystems EBC-C384 watchdog timer driver");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("isa:" MODULE_NAME);
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