Revision f6771dbb27c704ce837ba3bb1dcaa53f48f76ea8 authored by Ralf Baechle on 08 November 2007, 18:02:29 UTC, committed by Ralf Baechle on 15 November 2007, 23:21:49 UTC
Shadow register support would not possibly have worked on multicore systems. The support code for it was also depending not on MIPS R2 but VSMP or SMTC kernels even though it makes perfect sense with UP kernels. SR sets are a scarce resource and the expected usage pattern is that users actually hardcode the register set numbers in their code. So fix the allocator by ditching it. Move the remaining CPU probe bits into the generic CPU probe. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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| File | Mode | Size |
|---|---|---|
| binding.txt | -rw-r--r-- | 3.6 KB |
| bus.txt | -rw-r--r-- | 4.4 KB |
| class.txt | -rw-r--r-- | 4.6 KB |
| device.txt | -rw-r--r-- | 4.6 KB |
| devres.txt | -rw-r--r-- | 7.6 KB |
| driver.txt | -rw-r--r-- | 7.9 KB |
| interface.txt | -rw-r--r-- | 4.0 KB |
| overview.txt | -rw-r--r-- | 4.2 KB |
| platform.txt | -rw-r--r-- | 7.3 KB |
| porting.txt | -rw-r--r-- | 12.7 KB |
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