Revision ffab6cf44e9058fe75a33aa86386b22e616a8f6f authored by Sergei Shtylyov on 08 July 2008, 17:27:22 UTC, committed by Bartlomiej Zolnierkiewicz on 08 July 2008, 17:27:22 UTC
The driver uses completely bogus rounding formula for calculating period from the IDECLK frequency which gives one-off period values (e.g. 11 ns with 100 MHz IDECLK) which in turn can lead to overclocked IDE transfer timings. Actually, rounding is just wrong in this case, so use a mere division for a safe result. While at it, also: - give 'ide_palm_clk' variable a more suitable name; - get rid of the useless 'ideclkp' variable; - drop the LISP stype 'p' postfix from the 'clkp' variable's name. :-) Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: mcherkashin@ru.mvista.com Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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File | Mode | Size |
---|---|---|
Makefile | -rw-r--r-- | 86 bytes |
af_netlink.c | -rw-r--r-- | 43.5 KB |
attr.c | -rw-r--r-- | 11.4 KB |
genetlink.c | -rw-r--r-- | 17.6 KB |
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