Revision ffab6cf44e9058fe75a33aa86386b22e616a8f6f authored by Sergei Shtylyov on 08 July 2008, 17:27:22 UTC, committed by Bartlomiej Zolnierkiewicz on 08 July 2008, 17:27:22 UTC
The driver uses completely bogus rounding formula for calculating period from
the IDECLK frequency which gives one-off period values (e.g. 11 ns with 100 MHz
IDECLK) which in turn can lead to overclocked IDE transfer timings.  Actually,
rounding is just wrong in this case, so use a mere division for a safe result.

While at it, also:

- give 'ide_palm_clk' variable a more suitable name;

- get rid of the useless 'ideclkp' variable;

- drop the LISP stype 'p' postfix from the 'clkp' variable's name. :-)

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: mcherkashin@ru.mvista.com
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
1 parent a861beb
History
File Mode Size
Kconfig -rw-r--r-- 1.6 KB
Makefile -rw-r--r-- 271 bytes
af_x25.c -rw-r--r-- 37.5 KB
sysctl_net_x25.c -rw-r--r-- 2.5 KB
x25_dev.c -rw-r--r-- 4.3 KB
x25_facilities.c -rw-r--r-- 8.0 KB
x25_forward.c -rw-r--r-- 3.8 KB
x25_in.c -rw-r--r-- 8.8 KB
x25_link.c -rw-r--r-- 8.7 KB
x25_out.c -rw-r--r-- 5.3 KB
x25_proc.c -rw-r--r-- 7.7 KB
x25_route.c -rw-r--r-- 4.8 KB
x25_subr.c -rw-r--r-- 9.1 KB
x25_timer.c -rw-r--r-- 3.8 KB

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