swh:1:snp:0424f14fb59df2ee63d8659da5115ce9de06a349
Revision ffab6cf44e9058fe75a33aa86386b22e616a8f6f authored by Sergei Shtylyov on 08 July 2008, 17:27:22 UTC, committed by Bartlomiej Zolnierkiewicz on 08 July 2008, 17:27:22 UTC
The driver uses completely bogus rounding formula for calculating period from
the IDECLK frequency which gives one-off period values (e.g. 11 ns with 100 MHz
IDECLK) which in turn can lead to overclocked IDE transfer timings.  Actually,
rounding is just wrong in this case, so use a mere division for a safe result.

While at it, also:

- give 'ide_palm_clk' variable a more suitable name;

- get rid of the useless 'ideclkp' variable;

- drop the LISP stype 'p' postfix from the 'clkp' variable's name. :-)

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Cc: mcherkashin@ru.mvista.com
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
1 parent a861beb
History
Tip revision: e8b0ccb2a787fb43f8091a1eaef9c28a79b00002 authored by Linus Torvalds on 05 April 2024, 17:05:42 UTC
Merge tag '9p-for-6.9-rc3' of https://github.com/martinetd/linux
Tip revision: e8b0ccb
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