Revision ffadcc2ff42ecedf71ea67d9051ff028927aed08 authored by Kristen Carlson Accardi on 12 July 2006, 15:59:00 UTC, committed by Greg Kroah-Hartman on 12 July 2006, 23:05:48 UTC
When changing power states from D0->DX and then from DX->D0, some Intel PCIE chipsets will cause a device reset to occur. This will cause problems for any D State other than D3, since any state information that the driver will expect to be present coming from a D1 or D2 state will have been cleared. This patch addes a flag to the pci_dev structure to indicate that devices should not use states D1 or D2, and will set that flag for the affected chipsets. This patch also modifies pci_set_power_state() so that when a device driver tries to set the power state on a device that is downstream from an affected chipset, or on one of the affected devices it only allows state changes to or from D0 & D3. In addition, this patch allows the delay time between D3->D0 to be changed via a quirk. These chipsets also need additional time to change states beyond the normal 10ms. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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arch | ||
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crypto | ||
drivers | ||
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include | ||
init | ||
ipc | ||
kernel | ||
lib | ||
mm | ||
net | ||
scripts | ||
security | ||
sound | ||
usr | ||
.gitignore | -rw-r--r-- | 462 bytes |
COPYING | -rw-r--r-- | 18.3 KB |
CREDITS | -rw-r--r-- | 87.4 KB |
Kbuild | -rw-r--r-- | 1.2 KB |
MAINTAINERS | -rw-r--r-- | 69.7 KB |
Makefile | -rw-r--r-- | 46.1 KB |
README | -rw-r--r-- | 16.2 KB |
REPORTING-BUGS | -rw-r--r-- | 3.0 KB |
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