https://github.com/epiqc/ScaffCC
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Tip revision: c9bb19c5906c44795fde065e4a9c6b1e92c04968 authored by EPiQC on 06 August 2017, 15:43:30 UTC
Merge branch 'master' of https://github.com/epiqc/ScaffCC
Tip revision: c9bb19c
2003-08-23-RegisterAllocatePhysReg.ll
; RUN: %lli %s > /dev/null
; XFAIL: arm

; This testcase exposes a bug in the local register allocator where it runs out
; of registers (due to too many overlapping live ranges), but then attempts to
; use the ESP register (which is not allocatable) to hold a value.

define i32 @main(i32 %A) {
        ; ESP gets used again...
	%Ap2 = alloca i32, i32 %A		; <i32*> [#uses=11]
	; Produce lots of overlapping live ranges
        %B = add i32 %A, 1		; <i32> [#uses=1]
	%C = add i32 %A, 2		; <i32> [#uses=1]
	%D = add i32 %A, 3		; <i32> [#uses=1]
	%E = add i32 %A, 4		; <i32> [#uses=1]
	%F = add i32 %A, 5		; <i32> [#uses=1]
	%G = add i32 %A, 6		; <i32> [#uses=1]
	%H = add i32 %A, 7		; <i32> [#uses=1]
	%I = add i32 %A, 8		; <i32> [#uses=1]
	%J = add i32 %A, 9		; <i32> [#uses=1]
	%K = add i32 %A, 10		; <i32> [#uses=1]
        ; Uses of all of the values
	store i32 %A, i32* %Ap2
	store i32 %B, i32* %Ap2
	store i32 %C, i32* %Ap2
	store i32 %D, i32* %Ap2
	store i32 %E, i32* %Ap2
	store i32 %F, i32* %Ap2
	store i32 %G, i32* %Ap2
	store i32 %H, i32* %Ap2
	store i32 %I, i32* %Ap2
	store i32 %J, i32* %Ap2
	store i32 %K, i32* %Ap2
	ret i32 0
}
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