Revision 494e5b6faeda1d1e830a13e10b3c7bc323f35d97 authored by Khalid Aziz on 27 May 2015, 16:00:46 UTC, committed by David S. Miller on 01 June 2015, 05:15:01 UTC
sparc: Resolve conflict between sparc v9 and M7 on usage of bit 9 of TTE Bit 9 of TTE is CV (Cacheable in V-cache) on sparc v9 processor while the same bit 9 is MCDE (Memory Corruption Detection Enable) on M7 processor. This creates a conflicting usage of the same bit. Kernel sets TTE.cv bit on all pages for sun4v architecture which works well for sparc v9 but enables memory corruption detection on M7 processor which is not the intent. This patch adds code to determine if kernel is running on M7 processor and takes steps to not enable memory corruption detection in TTE erroneously. Signed-off-by: Khalid Aziz <khalid.aziz@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1 parent f0c1a11
| File | Mode | Size |
|---|---|---|
| 3com | ||
| acenic | ||
| adaptec | ||
| advansys | ||
| av7110 | ||
| bnx2 | ||
| bnx2x | ||
| cis | ||
| cpia2 | ||
| cxgb3 | ||
| dsp56k | ||
| e100 | ||
| edgeport | ||
| emi26 | ||
| emi62 | ||
| ess | ||
| kaweth | ||
| keyspan | ||
| keyspan_pda | ||
| korg | ||
| matrox | ||
| myricom | ||
| ositech | ||
| qlogic | ||
| r128 | ||
| radeon | ||
| sb16 | ||
| sun | ||
| tehuti | ||
| tigon | ||
| ttusb-budget | ||
| vicam | ||
| yam | ||
| yamaha | ||
| .gitignore | -rw-r--r-- | 39 bytes |
| Makefile | -rw-r--r-- | 10.9 KB |
| README.AddingFirmware | -rw-r--r-- | 1.5 KB |
| WHENCE | -rw-r--r-- | 26.3 KB |
| atmsar11.HEX | -rw-r--r-- | 18.7 KB |
| ihex2fw.c | -rw-r--r-- | 6.6 KB |
| mts_cdma.fw.ihex | -rw-r--r-- | 37.2 KB |
| mts_edge.fw.ihex | -rw-r--r-- | 37.8 KB |
| mts_gsm.fw.ihex | -rw-r--r-- | 37.2 KB |
| ti_3410.fw.ihex | -rw-r--r-- | 37.0 KB |
| ti_5052.fw.ihex | -rw-r--r-- | 37.0 KB |
| whiteheat.HEX | -rw-r--r-- | 43.9 KB |
| whiteheat_loader.HEX | -rw-r--r-- | 11.8 KB |
| whiteheat_loader_debug.HEX | -rw-r--r-- | 17.2 KB |
Computing file changes ...
