r200950:
  Implement RX interrupt moderation using one-shot timer interrupt.
  Unlike TX interrupt, ST201 does not provide any mechanism to
  suppress RX interrupts. ste(4) can generate more than 70k RX
  interrupts under heavy RX traffics such that these excessive
  interrupts make system useless to process other useful things.
  Maybe this was the major reason why polling support code was
  introduced to ste(4).
  The STE_COUNTDOWN register provides a programmable counter that
  will generate an interrupt upon its expiration. We program
  STE_DMACTL register to use 3.2us clock rate to drive the counter
  register. Whenever ste(4) serves RX interrupt, the driver rearm
  the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables
  further generation of RX interrupts. This trick seems to work well
  and ste(4) generates less than 8k RX interrupts even under 64 bytes
  UDP torture test. Combined with TX interrupts, the total number of
  interrupts are less than 10k which looks reasonable on heavily
  loaded controller.

  The default RX interrupt moderation time is 150us. Users can change
  the value at any time with dev.ste.%d.int_rx_mod sysctl node.
  Setting it 0 effectively disables the RX interrupt moderation
  feature. Now we have both TX/RX interrupt moderation code so remove
  loop of interrupt handler which resulted in sub-optimal performance
  as well as more register accesses.

r200955:
  Add suspend/resume support as well as basic WOL.
  While I'm here simplify SIOCSIFCAP handler.

r200965:
  Update if_iqdrops in case of RX buffer allocation failure.

r200966:
  ether_ifattach sets if_mtu, remove unnecessary code.

r201767:
  Fix EEPROM access code to return data in host byte order.
  EEPROM on ST201 always returns 16bits data with little endian
  format so conversion to host order is required.
  This change fixes inversed ethernet address on sparc64.

r201768:
  Make sure to store dma address of RX buffer in little endian form.
  This fixes the last bug which keeps ste(4) from working on sparc64.