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swh:1:snp:32555a3fd8878f019c2ebd6c964bc1edcaeff337
Revision 6910ceb5cababfefffc4ddc58a085a71c0ab9f22 authored by Russell King on 18 June 2013, 16:20:32 UTC, committed by Wim Van Sebroeck on 11 July 2013, 20:18:30 UTC 
Watchdog: fix clearing of the watchdog interrupt
 
The bits in BRIDGE_CAUSE are documented as RW0C - read, write 0 to
clear.  If we read the register, mask off the watchdog bit, and
write it back, we're actually clearing every interrupt which wasn't
pending at the time we read the register - and that is racy.

Fix this to only write ~WATCHDOG_BIT to the register, which means
we write as zero only the watchdog bit.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
1 parent fa142ff
History
Tip revision: ffb4d94b4314655cea60ab7962756e6bab72fc7e authored by Linus Torvalds on 30 September 2022, 23:25:52 UTC
Merge tag 'drm-fixes-2022-10-01' of git://anongit.freedesktop.org/drm/drm
Tip revision: ffb4d94
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