Revision 7d6c3a6d41a8583b463e1b06e4200a1a12fcc73f authored by alex@thinkpad on 09 April 2019, 13:10:37 UTC, committed by alex@thinkpad on 09 April 2019, 13:10:37 UTC
Quirk: if CPU is in ARM mode, the disassembler looks at the Thumb bit of the requested address. If CPU is in Thumb mode, the disassembler ignores the Thumb bit from the address, and always disassembles as Thumb. This inconsistency is also present in latest QEMU from git. Why? IDC scripts: comments containing disassembled Thumb code were updated (DIGIC 6/7/8 and 1300D).
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File | Mode | Size |
---|---|---|
1100D.105 | ||
500D.111 | ||
50D.109 | ||
550D.109 | ||
5D2.212 | ||
5D3.113 | ||
5D3.123 | ||
600D.102 | ||
60D.111 | ||
650D.104 | ||
6D.116 | ||
700D.115 | ||
7D.203 | ||
7D_MASTER.203 | ||
EOSM.202 | ||
all | ||
unmaintained | ||
Makefile | -rw-r--r-- | 1.1 KB |
Makefile.platform | -rw-r--r-- | 645 bytes |
Makefile.platform.base | -rw-r--r-- | 1.5 KB |
Makefile.platform.extras | -rw-r--r-- | 2.3 KB |
Makefile.platform.map | -rw-r--r-- | 1.7 KB |
README-unmaintained.txt | -rw-r--r-- | 423 bytes |
firmsum.py | -rw-r--r-- | 295 bytes |
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