Revision 8986d2f50e1a9ba63f64ccbf59181886aa7898c3 authored by Atsushi Nemoto on 24 June 2008, 14:26:38 UTC, committed by Ralf Baechle on 03 July 2008, 18:14:27 UTC
The txx9_tmr_init() will not clear a timer counter register in a certain case. The counter register is cleared on 1->0 transition of TCE bit if CRE=1. So just clearing the TCE bit is not enough. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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