Revision a904f5f9eb7a55baacb2f4c1423cac8a8eb78a3a authored by Catalin Marinas on 06 April 2011, 15:18:47 UTC, committed by Russell King on 12 May 2011, 09:52:00 UTC
Since mandatory barriers may be used (explicitly or implicitly via readl etc.) to ensure the ordering between Device and Normal memory accesses, a DMB is not enough. This patch converts it to a DSB. Cc: Colin Cross <ccross@android.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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| File | Mode | Size |
|---|---|---|
| 3com | ||
| acenic | ||
| adaptec | ||
| advansys | ||
| av7110 | ||
| bnx2 | ||
| bnx2x | ||
| cis | ||
| cpia2 | ||
| cxgb3 | ||
| dabusb | ||
| dsp56k | ||
| e100 | ||
| edgeport | ||
| emi26 | ||
| emi62 | ||
| ess | ||
| kaweth | ||
| keyspan | ||
| keyspan_pda | ||
| korg | ||
| matrox | ||
| myricom | ||
| ositech | ||
| qlogic | ||
| r128 | ||
| radeon | ||
| sb16 | ||
| sun | ||
| tehuti | ||
| tigon | ||
| ttusb-budget | ||
| vicam | ||
| yam | ||
| yamaha | ||
| .gitignore | -rw-r--r-- | 39 bytes |
| Makefile | -rw-r--r-- | 11.7 KB |
| README.AddingFirmware | -rw-r--r-- | 1.4 KB |
| WHENCE | -rw-r--r-- | 27.6 KB |
| atmsar11.HEX | -rw-r--r-- | 18.7 KB |
| ihex2fw.c | -rw-r--r-- | 6.6 KB |
| intelliport2.bin.ihex | -rw-r--r-- | 92.2 KB |
| mts_cdma.fw.ihex | -rw-r--r-- | 37.2 KB |
| mts_edge.fw.ihex | -rw-r--r-- | 37.8 KB |
| mts_gsm.fw.ihex | -rw-r--r-- | 37.2 KB |
| ti_3410.fw.ihex | -rw-r--r-- | 37.0 KB |
| ti_5052.fw.ihex | -rw-r--r-- | 37.0 KB |
| tr_smctr.bin.ihex | -rw-r--r-- | 20.5 KB |
| whiteheat.HEX | -rw-r--r-- | 43.9 KB |
| whiteheat_loader.HEX | -rw-r--r-- | 11.8 KB |
| whiteheat_loader_debug.HEX | -rw-r--r-- | 17.2 KB |
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