Revision d4f513ff12c1d74b379715e78c01002f5d055315 authored by Vipul Kumar Samar on 06 July 2012, 10:22:36 UTC, committed by Shiraz Hashim on 18 July 2012, 04:34:53 UTC
sys_clk has multiple parents and selection of parent depends on sys_clk_ctrl
register bit no. 23:25, with following possibilities

   0XX: pll1_clk
   10X: sys_synth_clk
   110: pll2_clk
   111: pll3_clk

Out of several possibilities (h/w wise) to select same clock parent for
sys_clk, current clock implementation was considering just one value.

When bootloader programmed different (valid) value to select a clock
parent then Linux breaks.

Here, we try to include all possibilities which can lead to same
clock selection thus making Linux independent of bootloader selection
values.

Signed-off-by: Vipul Kumar Samar <vipulkumar.samar@st.com>
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
1 parent d9ba8db
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r128_cce.bin.ihex -rw-r--r-- 5.5 KB

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